1. Field of the Invention
The present invention relates to a semiconductor device and an electronic apparatus using the same. More particularly, the present invention relates to a semiconductor device that uses two types of power supply voltages, i.e., a high power supply voltage and a low power supply voltage.
2. Description of Related Art
A conventionally known semiconductor device uses two different power supply voltages, for example, a high voltage (e.g., 5V) and a low voltage (e.g., 3V). The semiconductor device is provided with a test terminal that is used to test the acceptability of the semiconductor device before shipping. When a test signal is inputted from an outside source through the test terminal, the signal is first inputted through a buffer that is operated with a high power supply voltage to internal cells of the semiconductor device that are operated with the high power supply voltage.
In order to conduct a test on internal cells that are operated with the low power supply voltage, the test signal, that is inputted through the buffer operating with the high power supply voltage, is also supplied through a buffer that is operated with the lower power supply voltage to the internal cells operating with the low power supply voltage. In this manner, one test terminal is commonly used to receive test signals to test the plurality of internal cells that are operated with the high power supply voltage or the low power supply voltage.
In one type of semiconductor device, an input terminal of the input circuit is pulled up or down based on a logic on the test terminal in a normal operation mode, other than a test mode. In this case, a test signal may be transmitted to control the pull-up operation or the pull-down operation in a manner similar to the one described above in which a test signal is transmitted to the internal cells that are operated with the high power supply voltage or the low power supply voltage. For example, when the input terminal that receives a signal having an amplitude of a low voltage is pulled up, a test signal is transmitted through a buffer that is operated with a high power supply voltage. Then, the test signal is conducted to a gate of a transistor through a buffer that is driven with a low power supply voltage. The transistor is turned on or off to control the pull-up operation of the input terminal.
However, in recent years, transistors may be driven only with a low power supply voltage while a high power supply voltage is cut off in order to reduce the power consumption. Even in this case, a test signal is once inputted in a buffer that is driven with a high power supply voltage. However, the buffer cannot operate because the high power supply voltage is cut off. As a result, the logic of the test signal cannot be correctly transmitted to circuits that are operated with the low power supply voltage. This means that the necessary pull-up operation and pull-down operation for the input terminal cannot be accomplished when the transistors are driven only with a low power supply voltage with a high power supply voltage being cut off during the normal operation.
To solve the problems described above, independent test terminals may be provided respectively for a circuit that is driven with a high power supply voltage and a circuit that is driven with a low power supply voltage.
A semiconductor device manufacture requires test terminals. However, the user who purchases and uses the semiconductor device does not require such test terminals. Moreover, the number of external terminals of a semiconductor device is limited by the size of its circuit and the standard to be employed. Accordingly, the number of test terminals cannot readily be increased more than the presently available number.